Project Title: FFT Processor Using Radix-4Algorithm
A parallel and Fast that is Fourier that is pipelined processor for found in the Orthogonal Frequency division Multiplexer (OFDM) and WLAN, unlike being conserved in the original ROM. The twiddle facets inside the Fast Fourier Transform (FFT) that is pipelined processor be accessed straight. A novel simple target mapping scheme furthermore the modified radix 4 FFT also proposed. FPGA ended up being majorly accustomed develop the ASIC IC's to that particular ended up being implemented. Here it is simulated and synthesized the 256- point FFT with radix-4 VHDL that is using coding 64 point FFT Hardware execution is designed guideline using System C. Finally, the pipelined FFT that is 256-point are completely implemented within 19.103ns.