Enhancement MOSFET Physical Structure :

Figure below shows the simplified structure of the NMOS transistor. The NMOS transistor is fabricated on a p type substrate called as â€˜bulkâ€™ or â€˜bodyâ€™. The two heavily doped n+ regions are diffused in the p type substrate which forms the source and drain terminals.

A heavily doped (conducting) piece of polysilicon which is simply called as poly is operates as a gate terminal. A thin layer of silicon dioxide (SiO 2) acts as insulating material between poly and substrate.

A junction formed between poly,SiO2 and substrate is called as MOS (metal-oxide-semiconductor) junction. The useful action i.e. formation of channel is occurred in the substrate region which is laying under the gate oxide. The structure is symmetric with respect to source and drain.

The dimension of the gate along the source drain path is called as the length â€˜Lâ€™ and the dimension perpendicular to the length is called as width â€˜Wâ€™ of the transistor.

The ratio of width to length is called as ratio which plays important role in digital designs.

During the fabrication of Source and Drain junction the dopants are â€œside diffuseâ€ because of this the actual distance between source and drain is slightly less than â€˜Lâ€™.

Therefore Leff = Ldrawn - 2LD where L eff is effective length, Ldrawn is the total length and LD is the amount of side diffusion. The thickness of oxide t ox is the important parameter which decides the oxide capacitance Cox.

The principle thrust in MOS technology development is to reduce both L eff and tox from one generation to the next without degrading other device parameters.