Boundary scan is a test technique using scan methodology, involving digital services, digital devices, designed with scan flip flops placed between each device pin and the internal logic. These registers can control and observe signal values present at each input and output pin and are connected together in serial fashion to form a data register chain, called boundary scan shift register with shift and update stages.
The update stage latch prevents output from rippling as data is shifted through the shift register during scan operation. Figure above shows how the boundary scan registers can be connected in an ASIC. Test sets generated by automatic test pattern generation can be scanned into these boundary scan registers through scan in port such that test stimuli are applied parallel, circuit response can be captured in parallel by boundary scan registers connected between internal logic and output pins and scanned out through scan out port.