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Ac dc power converters
single phase full wave controlled rectifier
single phase half wave controlled rectifier
three phase full wave controlled rectifier
three phase half controlled rectifier
Amplifier
instrumentation amplifier
inverting amplifier
isolation amplifier
non inverting amplifier
operational amplifier
unity gain buffer
Analog integrated circuits
current to voltage converter
data converters
*
binary weighted resistor dac
*
counter type adc
*
dual slope type adc
*
flash type adc
*
r 2r ladder dac
*
successive approximation type adc
multivibrators
*
asymmetrical square wave generator
*
bistable multivibrators
*
monostable multivibrator
*
sawtooth waveform generator
*
triangular waveform generator
ocillators
op amp adder
op amp comparators
*
comparator as a duty cycle controller
*
comparator as a function generator
*
comparator ic lm 311
*
inverting comparator
*
non inverting comparator
*
voltage controlled oscillator
*
window comparator
opampdifferentiator
*
practical differentiator
*
summing differentiator
op amp integrator
*
difference integral
*
non inverting integrator
*
practical integrator
*
summing integrator
peak detector
phase locked loop
*
pll applications
*
pll ic 565
precision rectifier
*
modified precision full wave rectifier
*
non saturated type precision half wave rectifier
*
precision full wave rectifier
*
saturating type precision hwr
sample hold circuit
schmitt trigger
*
asymmetrical inverting schmitt trigger
*
inverting schmitt trigger
*
non inverting schmitt trigger
subtractordifference amplifier
voltage regulator
*
adjustable negative voltage regulator ics
*
current booster
*
dual power supply
*
low drop out voltage regulators
*
series regulator using op amp
*
three terminal adjustable voltage regulator ics
*
three terminal fixed voltage regulator ics
*
voltage regulators ics
Analog CMOS Design
CMOS Differential Amplifier
CMRR
Current Mirrors
Differential Amplifier
Cascode Op amp
Folded Cascode Op amp
Two Stage Op amp
MOSFET Amplifiers
Cascode Amplifier
CMOS Inverter as an Amplifier
Common Drain Amplifier
Common Gate Amplifier
Common Source Amplifier
CS Amplifier with Active Load
CS Amplifier with Current Source Load
Current Source Load Inverter
Frequency Response of CS Amplifier
PMOS Load Inverter
Push Pull Inverter
Body Effect
Current Sinks
Current Source
C V Characteristics
Enhancement MOSFET Physical Structure
I V Characteristics of PMOS Transistor
Linear Region of Operation
MOSFET Small Signal Model
Saturation Region of Operation
Threshold Voltage
MOSFET Parasitics
Interconnect Capacitance
Interconnect Delay Model
Interconnect Resistance
Parasitic capacitance Models
Parasitic Capacitances
Parasitic Capacitances MOSFETS
Source Drain Resistance
RF CMOS Circuits
Low Noise Amplifier
Mixers
Oscillator
RF Circuits
ADC Circuits
ADC DAC Blocks
DAC Circuits
Sampling Analog Signals
Signal Conditioning
Signal Quantization
Combinational logic circuits
arithmetic logic unit
binaryaddersubtractor
boolean algebra
decoders
demultiplexers
encoders
full adder
full subtractor
half adder
half subtractor
multiplexer
Control systems
feedback control system
transfer function and characteristic equation
transfer function of electrical circuit
Dccircuits
energy sources
kirchhoffs current law
kirchhoffs voltage law
maximum power transfer theorem
mesh analysis
nodal analysis
nortons theorem
source transformations
superposition theorem
thevenins theorem
Dc dc converter chopper
classification of chopper
step down chopper
step up chopper
switched mode power supplies smps
uninterruptible power supply ups
Dc to ac inverter
half bridge dc ac inverter
single phase full bridge inverter
single pwm inverters
three phase inverter
Digital CMOS Design
CMOS Inverter
Beta Ratio Effects
Dissipation due to Direct Path Currents
Dynamic Power Consumption
Noise Margin
Power Delay Product in CMOS
Power Dissipation minimization Techniques
Static Power Consumption
VTC CMOS Inverter
Width Length Ratio Calculation of CMOS
CMOS Layout Design
CMOS Design Flow
CMOS lambda Design Rules
Design Rule Check
Inverter Layout
Lambda based design rules
Layout Design Rules
Layout of logic gates
Micron Design Rules
Stick Diagrams
Technology scaling
Types of Scaling
CMOS Logic Gates
CMOS 4 input NOR gate
CMOS AND gate
CMOS Compound Gates
CMOS Half adder
CMOS NAND Gate
CMOS NOR Gate
CMOS OR gate
CMOS XNOR and XOR
Pull up and Pull Down Networks
Rules for Designing Complementary CMOS Gates
Three input CMOS NAND gate
MOS Capacitor
Band Diagram of Ideal MOS
Band Diagram of Nonideal MOS
Band Diagram of Nonideal MOS with Bias
MOS Definitions
MOSFET Fundamentals
MOSFET Fundamentals Introduction
Basic MOS Transistors
MOSFET as Switch
n channel Depletion Mode MOSFET
n channel Enhancement Mode MOSFET
p channel Depletion Mode MOSFET
p channel Enhancement Mode MOSFET
Non Ideal Effects
Body Effect
Hot Electron Effect
Mobility Variation
Subthreshold Conduction
Velocity Saturation
Pass Transistor Logic
2 1 MUX using transmission gate
4 1 multiplexer using CMOS logic
OR gate using pass transistor logic
Transmission Gate
XNOR gate using pass transistor logic
XOR gate using pass transistor logic
Propagation Delay
Delay Estimation
Elmore Delay Model
Parasitic Capacitances
RC Delay Model of Inverter
RC Delay Model of NAND Gate
Digital logic families
cmos and ttl interfaces
cmos logic
noise margin
ttl logic
Digital logic gates
and gate
nand gate
nor gate
not gate
or gate
xnor gate
xor gate
Electronic components
capacitors
*
ac analysis of capacitor
*
capacitive reactance
*
capacitorbasics
*
capacitor charge equations
*
capacitor types
*
capacitors in parallel combination
*
capacitors in series combination
*
colour coding in capacitors
*
multiple plate capacitor
*
parallel plate capacitor
inductors
*
inductive reactance
*
inductor basics
*
inductors in parallel combination
*
inductors in series combination
*
mutual inductance
*
self inductance
resistors
transformers
Electronic devices
diode
insulated gate bipolar transistor
mosfet
power mosfet
transistors
Electronic instruments
digital voltmeters
*
dual slope dvm
*
ramp type dvm
oscilloscope
*
cathode ray oscilloscope
waveform
Electronic systems
brushless dc motors
induction motor
public address system
separately excited dc motor
servomotors
stepper motor
Finite state machines
Algorithmic State Machines
*
ASM chart 2 bit up down counter
*
ASM chart for signal generator
*
ASM charts
*
ASM Chart Tool for Sequential Circuit Design
*
Design with Multiplexers
Asyncronous FSM Design
*
Analysis of Asynchronous Sequential Machines
*
Asynchronous FSM
*
Design of Asynchronous Sequential Machine
*
Design Procedure for Asynchronous Sequential Circuits
*
Essential Hazards
*
Hazardfree circuit
*
Modes of Asynchronous Sequential Machines
FSM Applications
*
UART Transmitter Design
*
UART Receiver Design
*
Traffic Light Controller
*
Simple Traffic Controller
*
Serial Adder
*
Sequential Counters JKFF
*
Sequential Counters DFF
*
Sequential Counters
*
Sequence Generator
*
Sequence Detector
*
Lift Controller
Hazards
*
Detection of Static Hazards
*
Dynamic Hazards
*
Effects of Hazards
*
Elimination of Static Hazards
*
Static Hazards
Metastability
*
JK flipflop State Machine
*
Metastability measurement setup
*
Metastability Synchronizer
State Machine Fundamentals
*
Analysis of Sequential Circuits
*
Excitation Tables for Flip Flops
*
Finite State Machine Diagram
*
Mealy Finite State Machine
*
Moore Finite State Machine
*
Need for State Machines
*
State Diagrams
*
State Encoding Techniques
*
State Machine
*
State Minimization
*
VHDL Coding of FSM
Number systems
binary number system
binarynumbers
binary to decimal conversion
decimal number system
decimal to binary conversion
decimal to hexadecimal conversion
decimal to octal conversion
hexadecimal number system
hexadecimal to decimal conversion
octal number system
octal to decimal conversion
Programmable Logic Device Architectures
CPLD
Advanced Micro Devices AMD CPLDs
Altera FLASH logic CPLDs
Altera MAX 7000 CPLD
Complex Programmable Logic Device CPLDs
CPLD Packaging
Cypress FLASH370 CPLDs
ICT PEEL Arrays
Lattice CPLDs
XC9500 CPLD Family
FPGA
Field programmable gate array FPGA
FPGA Programming
FPGA Structures
XC4000 FPGA Family
XC5200 FPGA Family
Programmable Logic Devices
Application Specific Integrated Circuits ASIC
Discrete Devices Technology
Evolution of Programmable Logic Devices
Programmable Array Logic PAL
Programmable Logic Array PLA
Programmable Logic Device Technology
Programmable Read only Memory PROM
Simple Programmable Logic Devices SPLD
Programmable logic devices
complex programmable logic device
field programmable gate array
generic array logic
programmable array logic
programmable logic array
programmable roms
Sequential logic circuits
asynchronous counter
counters
d flip flop to jk flip flop
d flip flop to sr flip flop
d flip flop
flip flop excitation table
jk flip flop to d flip flop
jk flip flop to sr flip flop conversion
jk flip flop to t flip flop
jk flip flop
parallel in to parallel out pipo shift register
parallel in to serial out piso shift register
serial in to parallel out sipo shift register
serial in to serial out siso shift register
shift registers
sr flip flop to d flip flop
sr flip flop to jk flip flop conversion
sr flip flop
synchronous counter
toggle flip flop
System On Chip
Clock Distribution
Clock Jitter
Clock Skew
Interconnects
Interconnect Routing Techniques
RC Wire Model
Wire Capacitance
Wire Resistance
Wiring Parasitics
Power Distribution
Power Distribution Techniques
Power Optimization
Signal Integrity Issues
Supply and Ground Bounce
SOC Designs
Design Validation
EMI Immune Design
IO Architectures and Pad Design
Off Chip Connections
One Phase System
Two Phase System
Thyristor
characteristics of thyristor
gate characteristics of thyristor
ratings of thyristor
thyristor commutation
thyristor commutation techniques
triggering circuit of thyristor
VHDL
*
Hardware Description Languages
*
Introduction to VHDL
*
VHDL Program Format
*
Structure of VHDL Program
*
Data Flow Modeling
*
Behavioral modeling
*
Data types
*
Structural modeling
*
Mixed modeling
*
Hardware Description Languages
*
Hardware Description Languages
*
Operators
*
Synthesis
*
Types of Delays
*
VHDL Program Format
*
VHDL Simulation
*
VHDL statements
*
Attributes
*
Configuration Declaration
*
Configuration Specification
*
Configurations
*
Function
*
Generics
*
Package
*
Procedure
*
Subprograms
*
TestBench
*
Adder Subtractor
*
Adder Subtractor
*
ALU
*
ALU
*
Carry ripple adder
*
Comparators
*
Divider
*
Full adder
*
Half adder
*
Multiplier
*
n bit adder
*
Simple Equality Comparator
*
Simple Equality Comparator
*
Subtractor
*
Subtractor
*
Assertion statement
*
Assertion statement
*
Block Statement
*
Block Statement
*
Component Declarations
*
Component Declarations
*
Component Instantiation
*
Concurrent Signal Assignments
*
Exit Statements
*
For generate Statement
*
Generate Statements
*
Loop statements
*
Next statements
*
Next statements
*
Report Statement
*
Report Statement
*
Return statements
*
Return statements
*
Wait Statements
*
When Statement
*
with Select Statement
*
with Select Statement
Vlsi
Evolution of Digital IC Technologies
IC Development Cycle
VLSI Technology
VLSI Design Flow
CMOS IC Technology
*
Boundary Scan Standards
*
Boundary Scan
*
Built in Logic Block Observer BILBO
*
Built in Self Testing BIST
*
Combinational Logic Testing
*
Controllability
*
Fault Coverage
*
Fault Modeling
*
Full Scan
*
IC Testing
*
JTAG TAP Controller
*
JTAG TAP Controller
*
JTAG
*
JTAG
*
Linear Feedback Shift Register LFSR
*
Linear Feedback Shift Register LFSR
*
Need of Design for Testability
*
Need of Design for Testability
*
Partial Scan
*
Scan Path Testing
*
Signature Analysis
*
Stuck open and Stuck short Faults
Vlsi
Evolution of Digital IC Technologies
IC Development Cycle
VLSI Technology
VLSI Design Flow
CMOS IC Technology
*
Boundary Scan Standards
*
Boundary Scan
*
Built in Logic Block Observer BILBO
*
Built in Self Testing BIST
*
Combinational Logic Testing
*
Controllability
*
Fault Coverage
*
Fault Modeling
*
Full Scan
*
IC Testing
*
JTAG TAP Controller
*
JTAG TAP Controller
*
JTAG
*
JTAG
*
Linear Feedback Shift Register LFSR
*
Linear Feedback Shift Register LFSR
*
Need of Design for Testability
*
Need of Design for Testability
*
Partial Scan
*
Scan Path Testing
*
Signature Analysis
*
Stuck open and Stuck short Faults
Vlsi design for testability
Boundary Scan Standards
Boundary Scan
Built in Logic Block Observer BILBO
Built in Self Testing BIST
Combinational Logic Testing
Controllability
Fault Coverage
Fault Modeling
Full Scan
IC Testing
JTAG TAP Controller
JTAG TAP Controller
JTAG
JTAG
Linear Feedback Shift Register LFSR
Linear Feedback Shift Register LFSR
Need of Design for Testability
Need of Design for Testability
Partial Scan
Scan Path Testing
Signature Analysis
Stuck open and Stuck short Faults
Mini projects
2 Bit Parallel or Flash Analog to Digital Converter
3 Bit Flash Type Analog to Digital Converter