Digital-CMOS-Design CMOS-Inverter CMOS-Layout-Design CMOS-Logic-Gates MOS-Capacitor MOSFET-Fundamentals Non-Ideal-Effects Pass-Transistor-Logic Propagation-Delay

Power Dissipation minimization Techniques

Power Dissipation minimization Techniques :

Total Power Consumption of CMOS Inverter :

Now, by considering all the power dissipation components i.e. dynamic power dissipation, power dissipation in direct current paths and static power dissipation, the total power dissipation is given by,

		Ptotal	=	Pdynamic + Pdp  + Pstatic		  
			=	CL VDD2 f + tdp · VDD · Ip · f + Ileakage VDD 
			=	(CLVDD2 +  tdp · VDD · IP) f + Ileakage VDD

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