Altera FLASH logic CPLDs

Altera’s FLASH logic has in-system programmability and provides on-chip SRAM blocks. The left part of below figure shows the architecture of FLASH logic devices which consists of PAL blocks known as Configurable Function Blocks. FLASH logic is same as that of the other structures. Each PAL-like block, is configured as a block of 10 nsec Static RAM. This concept is shown in the figure. Here, Configurable Function Blocks can be used as a PAL and configured as an SRAM. In FLASH logic device, the AND-OR logic configuration bits are SRAM cells or EEPROM cells.


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