Design for Testability

Boundary-Scan-Standards

Boundary-Scan

Built-in-Logic-Block-Observer-BILBO

Built-in-Self-Testing-BIST

Combinational-Logic-Testing

Controllability

Fault-Coverage

Fault-Modeling

Full-Scan

IC-Testing

JTAG-TAP-Controller

JTAG

Linear-Feedback-Shift-Register-LFSR

Need-of-Design-for-Testability

Observability

Partial-Scan

Scan-Path-Testing

Signature-Analysis

Stuck-open-and-Stuck-short-Faults

VLSI 5

Evolution of Digital IC Technologies

IC Development Cycle

VLSI Technology

VLSI Design Flow

CMOS IC Technology