A NOT gate is a one-input, one-output logic circuit whose output is complement of the input. i.e. LOW input produces a HIGH output, and HIGH input produces a LOW output. Logic ‘0’ at the input produces a logic ‘1’ at the output, and vice versa. It is also known
as a inverting circuit. Figure shows the circuit symbol and the
truth table of NOT gate. The NOT operation on a logic variable X is denoted as X’ . That is, if X is the input to a NOT circuit, then its output Y is given by Y = X’ . Thus, if X = 0, then Y = 1 and if X = 1, then Y = 0.
The circuit below is the simplest CMOS logic gate.When a low voltage (0 V) is applied at the input, the top transitor (P-type) is conducting (switch closed) while the bottom transitor behaves like an open circuit.Therefore, the supply voltage (5 V) appears at the output.Conversely, when a high voltage (5 V) is applied at the input, the bottom transitor (N-type) is conducting (switch closed) while the top transitor behaves like an open circuit.Hence, the ouput voltage is low (0 V).The function of this gate can be summarized by the table. The output is the opposite of the input – this gate inverts the input. Notice that always one of the transistor will be an open circuit and no current flows from the supply voltage to ground.