Lattice gives CPLDs, with two product lines. The lattice pLSI and ispLSI. For both pLSI and ispLSI products, lattice has three families with different capacities and speed. The IC consists of SPLD blocks and global routing pool. Lattice also has CPLD family known as 2000 series. Lattice 3000 series shows the CPLDs, with 5000 gates. The 3000 series gives some enhancements over the other lattice families. The general structure of a Lattice pLSI or ispLSI device is shown in below figure. The outside edges of the chip are bi-directional I/Os, and connected to the Generic Logic Blocks and the Global Routing Pool. The Generic Logic Blocks are small PAL blocks that consists of an AND-array, product term allocator, and macrocells. The Global Routing Pool is set of wires available to connect the Generic Logic Blocks inputs and outputs together.